| Back | 减少元件和电路的几何尺寸，以达到增加电路的封装密度、减少功耗和减小信号传播延迟的目的。 |
|---|---|
| Front | jiǎnshǎo yuánjiàn hé diànlù de jǐhé chǐcun yǐ dádào zēngjiā diànlù de fēngzhuāng mìdù jiǎnshǎo gōnghào hé jiǎnxiǎo xìnhào chuánbō yánchí de mùdì The reduction in size of components and circuits for increasing package density and reducing power dissipation and signal propagation delays. |
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